llvm::mca::Instruction

Synopsis

Declared in <llvm/MCA/Instruction.h>

class Instruction
    : public InstructionBase

Description

This class is used to monitor changes to the internal state of instructions that are sent to the various components of the simulated hardware pipeline.

Base Classes

Name	Description
`InstructionBase`	Base class for instructions consumed by the simulation pipeline.

Member Functions

Name	Description
`Instruction` [constructor]	Construct a pipeline instruction from descriptor `D` and opcode `Opcode.`
`addOperand`	Append MCA operand `Op` to this instruction.
`clearOptimizableMove`	Clear the move-elimination candidate flag.
`clearUsedBuffers`	Clear the bitmask of buffered resources.
`computeCriticalRegDep`	Compute and cache the critical register dependency from operand state.
`cycleEvent`	Advance instruction state by one simulated cycle.
`dispatch`	Transition to the dispatch stage and assign Retire Unit token `RCUTokenID.`
`execute`	Issue this instruction: transition to executing and update definitions.
`forceExecuted`	Force a transition from dispatched directly to executed.
`getBeginGroup`	Return true if this instruction begins an instruction group.
`getCriticalMemDep`	Return the critical memory dependency for this instruction.
`getCriticalRegDep`	Return the critical register dependency for this instruction.
`getCriticalResourceMask`	Return the bitmask of busy processor resources delaying execution.
`getCyclesLeft`	Return cycles remaining until execution completes.
`getDefs`	`getDefs` overloads
`getDesc`	Return the instruction descriptor.
`getEndGroup`	Return true if this instruction ends an instruction group.
`getHasSideEffects`	Return true if this instruction has side effects.
`getLSUTokenID`	Return the Load/Store Unit token ID.
`getLatency`	Return the maximum latency from the descriptor.
`getMayLoad`	Return true if this instruction may load from memory.
`getMayStore`	Return true if this instruction may store to memory.
`getNumMicroOps`	Return the number of micro-ops from the descriptor.
`getNumOperands`	Return the number of MCA operands attached to this instruction.
`getNumUsers`	Return the total number of dependent users across all definitions.
`getOpcode`	Return the instruction opcode.
`getOperand`	Return the MCAOperand which corresponds to index Idx within the original MCInst.
`getRCUTokenID`	Return the Retire Control Unit token ID.
`getRetireOOO`	Return true if this instruction may retire out of order.
`getUsedBuffers`	Return the bitmask of buffered resources used at dispatch.
`getUses`	`getUses` overloads
`hasDependentUsers`	Return true if any register definition still has dependent users.
`isALoadBarrier`	Return true if this instruction is a load barrier.
`isAStoreBarrier`	Return true if this instruction is a store barrier.
`isDispatched`	Return true if the instruction has been dispatched.
`isEliminated`	Return true if the instruction was eliminated at register renaming.
`isExecuted`	Return true if the instruction has finished executing.
`isExecuting`	Return true if the instruction is currently executing.
`isInvalid`	Return true if the instruction is in the invalid stage.
`isMemOp`	Return true if this instruction may load or store memory.
`isOptimizableMove`	Return true if this instruction is a candidate for move elimination.
`isPending`	Return true if the instruction is pending on known operand latency.
`isReady`	Return true if the instruction is ready to issue.
`isRetired`	Return true if the instruction has retired.
`reset`	Reset pipeline state so this instruction can be reused.
`retire`	Transition from executed to retired.
`setBeginGroup`	Set whether this instruction begins an instruction group.
`setCriticalMemDep`	Set the critical memory dependency to `MemDep.`
`setCriticalResourceMask`	Set the bitmask of busy processor resources delaying execution.
`setEliminated`	Mark this instruction as eliminated at register renaming.
`setEndGroup`	Set whether this instruction ends an instruction group.
`setHasSideEffects`	Set whether this instruction has side effects.
`setLSUTokenID`	Set the Load/Store Unit token ID to `LSUTok.`
`setLoadBarrier`	Set whether this instruction is a load barrier.
`setMayLoad`	Set whether this instruction may load from memory.
`setMayStore`	Set whether this instruction may store to memory.
`setOptimizableMove`	Mark this instruction as a move-elimination candidate.
`setRetireOOO`	Set whether this instruction may retire out of order.
`setStoreBarrier`	Set whether this instruction is a store barrier.
`setUsedBuffers`	Set the bitmask of buffered resources used at dispatch.
`update`	Recompute stage after dispatch when operand readiness may have changed.
`updateDispatched`	Update state while still in the dispatched stage; return true if changed.
`updatePending`	Update state while pending on known latency; return true if changed.