llvm::MCRegisterInfo

Synopsis

Declared in <llvm/MC/MCRegisterInfo.h>

class MCRegisterInfo;

Description

Targets define a static array of MCRegisterDesc objects for every machine register. This class holds a pointer to that array so register numbers can be turned into descriptors.

Note this class is designed to be a base class of TargetRegisterInfo, which is the interface used by codegen. However, specific targets should never specialize this class. MCRegisterInfo should only contain getters to access TableGen generated physical register data. It must not be extended with virtual methods.

Types

Name	Description
`DwarfLLVMRegPair`	DwarfLLVMRegPair - Emitted by tablegen so Dwarf<->LLVM reg mappings can be performed with a binary search.

Type Aliases

Name	Description
`regclass_iterator`	Iterator over register classes in this target.

Member Functions

Name	Description
`~MCRegisterInfo` [destructor] [virtual]	Destroy the register info.
`InitMCRegisterInfo`	Initialize MCRegisterInfo, called by TableGen auto-generated routines. DO NOT USE.
`get`	Provide a get method, equivalent to [], but more useful with a pointer to this object.
`getCodeViewRegNum`	Map a target register to an equivalent CodeView register number.
`getDwarfRegNum` [virtual]	Map a target register to an equivalent dwarf register number.
`getDwarfRegNumFromDwarfEHRegNum`	Map a target EH register number to an equivalent DWARF register number.
`getEncodingValue`	Returns the encoding for Reg
`getLLVMRegNum`	Map a dwarf register back to a target register. Returns std::nullopt if there is no mapping.
`getMatchingSuperReg`	Return a super-register of the specified register Reg so its sub-register of index SubIdx is Reg.
`getName`	Return the human-readable symbolic target-specific name for the specified physical register.
`getNumRegClasses`	Return the number of register classes defined by the target.
`getNumRegUnits`	Return the number of (native) register units in the target.
`getNumRegs`	Return the number of registers this target has (useful for sizing arrays holding per register information)
`getNumSubRegIndices`	Return the number of sub-register indices understood by the target.
`getProgramCounter`	Return the register which is the program counter.
`getRARegister`	This method should return the register where the return address can be found.
`getRegClass`	Returns the register class associated with the enumeration value. See class MCOperandInfo.
`getRegClassName`	Return the name of register class `Class.`
`getSEHRegNum`	Map a target register to an equivalent SEH register number. Returns LLVM register number if there is no equivalent value.
`getSubReg`	Returns the physical register number of sub-register "Index" for physical register RegNo. Return zero if the sub-register does not exist.
`getSubRegIndex`	For a given register pair, return the sub-register index if the second register is a sub-register of the first. Return zero otherwise.
`hasRegUnitIntervals`	Returns true if this target uses regunit intervals.
`isArtificial`	Return true if the given register is artificial.
`isArtificialRegUnit`	Return true when the given register unit is considered artificial.
`isConstant`	Returns true if the given register is constant.
`isSubRegister`	Returns true if RegB is a sub-register of RegA.
`isSubRegisterEq`	Returns true if RegB is a sub-register of RegA or if RegB == RegA.
`isSuperOrSubRegisterEq`	Returns true if RegB is a super-register or sub-register of RegA or if RegB == RegA.
`isSuperRegister`	Returns true if RegB is a super-register of RegA.
`isSuperRegisterEq`	Returns true if RegB is a super-register of RegA or if RegB == RegA.
`mapDwarfRegsToLLVMRegs`	Used to initialize Dwarf register to LLVM register number mapping. Called by TableGen auto-generated routines. DO NOT USE.
`mapLLVMRegToCVReg`	Map an LLVM register number to a CodeView register number.
`mapLLVMRegToSEHReg`	Map an LLVM register number to an SEH register number.
`mapLLVMRegsToDwarfRegs`	Used to initialize LLVM register to Dwarf register number mapping. Called by TableGen auto-generated routines. DO NOT USE.
`operator[]`	Return the descriptor for physical register `Reg.`
`regclass_begin`	Return an iterator to the first register class.
`regclass_end`	Return an iterator past the last register class.
`regclasses`	Return a range over all register classes.
`regsOverlap`	Returns true if the two registers are equal or alias each other.
`regunits`	`regunits` overloads
`regunits_interval`	Returns an iterator range over all native regunits in the RegUnitInterval table for `Reg.`
`sub_and_superregs_inclusive`	Return an iterator range over all sub- and super-registers of `Reg,` including `Reg.`
`subregs`	Return an iterator range over all sub-registers of `Reg,` excluding `Reg.`
`subregs_inclusive`	Return an iterator range over all sub-registers of `Reg,` including `Reg.`
`superregs`	Return an iterator range over all super-registers of `Reg,` excluding `Reg.`
`superregs_inclusive`	Return an iterator range over all super-registers of `Reg,` including `Reg.`

Friends

Name	Description
`llvm::MCRegAliasIterator`	MCRegAliasIterator enumerates all registers aliasing Reg.
`llvm::MCRegUnitRootIterator`	MCRegUnitRootIterator enumerates the root registers of a register unit.
`llvm::MCRegUnitMaskIterator`	MCRegUnitMaskIterator enumerates a list of register units and their associated lane masks for Reg. The register units are in ascending numerical order.
`llvm::MCRegUnitIterator`	MCRegUnitIterator enumerates a list of register units for Reg.
`llvm::MCSuperRegIterator`	MCSuperRegIterator enumerates all super-registers of Reg. If IncludeSelf is set, Reg itself is included in the list.
`llvm::MCSubRegIndexIterator`	Iterator that enumerates the sub-registers of a Reg and the associated sub-register indices.
`llvm::MCSubRegIterator`	MCSubRegIterator enumerates all sub-registers of Reg. If IncludeSelf is set, Reg itself is included in the list.

Derived Classes

Name	Description
`TargetRegisterInfo`	Target register information for a machine's register file.