Parsed RISC‐V ISA extension set and derived length properties.
Synopsis
Declared in <llvm/TargetParser/RISCVISAInfo.h>
class RISCVISAInfo;
Member Functions
Name |
Description |
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Copy construction is deleted; instances are created via factory methods. |
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Copy assignment is deleted; instances are created via factory methods. |
Return the default ABI name implied by XLEN and enabled extensions. |
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Return the ordered map of enabled extensions and their versions. |
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Return the floating‐point register width in bits (FLEN), or 0 if none. |
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Return the maximum EEW for integer vector loads/stores in bits. |
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Return the maximum EEW for floating‐point vector loads/stores in bits. |
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Return the maximum vector register length in bits (VLEN). |
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Return the minimum vector register length in bits (VLEN). |
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Return the base integer register width in bits (XLEN). |
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Return true if extension |
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Convert RISC‐V ISA info to a feature vector. |
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Return the canonical ISA string for the enabled extensions. |
Static Member Functions
Name |
Description |
Create RISC‐V ISA info from an XLEN and an ordered extension map. |
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Return the group id and bit position of __riscv_feature_bits. |
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Return the target‐feature name for extension string |
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Return true if |
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Return true if |
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Parse RISC‐V ISA info from an architecture string. |
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Parse RISC‐V ISA info from a feature vector. |
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Parse RISC‐V ISA info from a normalized architecture string. |
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Print the enabled RISC‐V extensions for a target to standard output. |
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Print all supported RISC‐V ‐march extensions to standard output. |
Static Data Members
Name |
Description |
The maximum value of the group ID obtained from getRISCVFeaturesBitsInfo. |
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